• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    1. A method for synchronizing digital network generators, in particular a digital communication network with pulse code modulation and time-multiplexing of channels with synchronizing generators in digital communication network nodes using at least one generator of another digital communication network, in which, at each node of the digital communication network, after a corresponding division of the clock frequency of the clock pulse sequence, arriving at the corresponding receiving link, and the clock frequency, The clock pulses of the station clock generator, respectively, the receive clock of the receive link and the clock clock of the clock of the station are compared in phase, and the clock frequency of the clock clock pulse sequence is generated from the nodes of the digital communication network of the phase difference signals. station generator, characterized in that, in order to increase the range of the adjustment of the clock frequency, in each The node of the digital communication network, to which the receiving communication link from another digital communication network arrives, compares the phase difference between a sequence of clock pulses received over a receiving communication link from another digital communication network, and a sequence of clock pulses of the clock generator of a station with phase differences obtained at other O) nodes of the digital communication network, when comparing the phases between a sequence of clock pulses received over a receiving communication link from another digital communication network, and Owing to the clock frequency of the station clock generator of the corresponding digital communication network node, the maximum phase difference is determined by at least a one-time increase from the division factor of this receiving link between two adjacent pulses of the corresponding clock sequence relative to the frequency division factor of the receiving lines come to other nodes of a digital communication network from another digital communication network. 2. The method according to claim 1, wherein the relative increase in the frequency division factor is repeated at a repetition rate f selected from the condition 1 / G and / or D is constant
    公开号:SU1105131A3
    申请号:SU762362505
    申请日:1976-05-26
    公开日:1984-07-23
    发明作者:Драготинов Александр；Лотар Хартманн Харро
    申请人:Сименс Аг (Фирма)；
    IPC主号:
    专利说明:

    the time of the control circuit of the synchronized digital communication network, and - the maximum frequency difference between the unsynchronized frequency of the digital communication network and the frequency of another digital communication network. 3. A device for implementing the method according to claim 1, contained in each node of the digital communication network n signal processing channels (n is the number of receiving communication lines from other nodes of the digital communication network), each of which consists of consecutively connected the selector of the sequence of clock pulses of the line, the divider clock frequency of the line and the phase discriminator, while leaving the outputs of the phase discriminators of the signal processing channels through the series-connected adder and filter connected to the input of the clock generator stants1P1, the output of which is connected to the control inputs of the phase discriminators via a clock generator frequency divider; the additional outputs of which and the clock frequency dividers outputs of the lines are connected to the control inputs of the reference phase setting unit, the outputs of which are connected to the control inputs of the line frequency dividers, characterized in that it introduced an additional signal processing channel for the receiving communication line, - connected to another digital communication network, consisting of series-connected selector a sequence of clock pulses of a line, a block, a clock frequency divider and a phase discriminator, the output of which is connected via an additional filter to one of the inputs of the comparison unit, the other input of which is connected to the output of the additional filter of the additional signal processing channel entered into another digital communication network node for another receiving communication link from another digital communication network, and the output of the comparator unit through the transmitter. b impulse pulses are connected to the control input of the prohibition unit, in addition, the output of the phase discriminator is connected to the auxiliary input of the adder.
    4. The device according to claim 3, characterized in that between the inhibitor pulse driver and the control input of the inhibitor block, an element is included, to the other inputs of which are connected the outputs of other comparison blocks, to the inputs of which signals of other digital communication network nodes are connected.
    5. The device according to claim 3, characterized in that the first and second converters are connected to the inputs of the unit comparing I, respectively, to the inputs of which other digital communication network signals are connected.
    The invention relates to communication technology and can be used in systems with pulse code modulation and time channel multiplexing.
    . A known method of synchronization of generators of a digital communication network, in particular a digital communication network with a pulse-CODO 13 modulation (PCM) and times} is the first wireless channel and provided at the digital communication network nodes that reduce each other roiiejuiTi paMn through at least one generator drui: ni digital communication network, gri which in each node of the digital communication network after the corresponding division of the clock frequency of the sequence of clock pulses received through the corresponding receiving afnniH communication, and clock frequency. STI clock station clock generator formed by a sequence of clock pulses respectively receiving link and a sequence of clock pulses clock station is compared in phase, and from poluchennps nodes from the digital network communication signal phase differences
    eleven
    knots should be set up and a unit for comparing the phase ratio signal should be provided. Pa figs. 2, for this case, an element 19 is turned on, the inputs of which are connected to the drives of the steel comparison blocks, and the output is connected to the locking input of the prohibition block 11. This achieves that only a difference that exceeds any compared with Heit causes a time limit and, if necessary, a multiple increase in the division factor, due to which unambiguous conditions are always provided in the system of input nodes.
    Thus, a sufficiently uniform distribution is always ensured.
    12
    division of the phase difference in the input nodes E, F, C of the digital network AND the connection between the clock pulses of the receiving communication lines coming from another digital network 1 and the clock pulses of the clock generator corresponding to the nodes, i.e. transients in this system of input nodes of a communication network, the repetition frequency with which pulse locking can occur can be reduced by one to two orders, due to which the accuracy of the adjustment is 1 (the frequency of the digital communication network II is equal to digital network 1 connection, if necessary, locking impu: 1sov then can be terminated altogether.
    权利要求:
    Claims (5)
    [1]
    1. A method for synchronizing generators of a digital communication network, in particular a digital communication network with pulse-code modulation and temporary channel multiplexing, with generators synchronizing with each other in the nodes of the digital communication network by means of at least one generator of another digital communication network, in which at each node of the digital network communication after the appropriate division of the clock frequency of the sequence of clock pulses arriving on the corresponding receiving communication line, and the clock frequency of the sequence and clock pulses of the station clock, the corresponding sequence of clock pulses of the receiving communication line and the sequence of clock pulses of the clock generator of the station are compared in phase, and from the signals of the phase difference signals received from the nodes of the digital communication network, a signal for adjusting the clock frequency of the sequence of clock pulses of the station clock is generated , which is characterized in that, in order to increase the adjustment range of the clock frequency, in each node of the digits of the communication network to which the receiving communication line from another digital communication network arrives, the phase difference between the sequence of clock pulses arriving on the receiving communication line from the other digital communication network and the sequence of clock pulses of the station clock with the corresponding phase differences g are compared, obtained in other nodes of the digital communication network, when comparing the phases between the sequence of clock pulses received on the receiving communication line from another digital communication network, and the sequence of clock the output pulses of the clock generator of the station of the corresponding node of the digital communication network determine the maximum phase difference by at least once increasing the division ratio of a given receiving line between two adjacent pulses of the corresponding sequence of clock pulses relative to the frequency division coefficient of the receiving communication lines that arrive at other nodes of the digital communication network from another digital communications network.
    [2]
    2. The method of pop. 1, characterized in that the relative increase in the division ratio is repeated with a repetition rate selected from the condition 1 / T> f w and / or max , where b is a constant
    SU <„, 1105131
    1 »05 131 times of the control circuit of a synchronized digital communication network, and D1! max - maximum frequency difference between the unsynchronized frequency of the digital communication network and the frequency of another digital communication network.
    ‘
    [3]
    3. A device for implementing the pop method! 1, containing in each node of the digital communication network η signal processing channels (n is the number of receiving communication lines from other nodes of the digital communication network), each of which consists of a series-connected selector of a sequence of clock pulses of the line, a divider of the clock frequency of the line and phase discriminator, while the outputs of the phase discriminators η of the signal processing channels through a series-connected adder and filter are connected to the input of the clock of the station, the output of which is connected to the control inputs basic discriminators through a clock generator divider of the station, the additional inputs of which and the outputs of the line clock dividers are connected to the control inputs of the reference phase setting unit, the outputs of which are connected to the control inputs of the line clock dividers, characterized in that an additional signal processing channel for receiving line connected to the other
    The first digital communication network, consisting of a series line clock pulse selector, a prohibition block, a line clock divider and a phase discriminator, the output of which is connected through an additional filter to one of the inputs of the comparison unit, the other input of which is connected to the output of an additional filter a signal processing channel inserted into another node of the digital communication network for another receiving communication line from another digital communication network, and the output of the comparison unit through the form Vat b pulse suppression is connected to the control input prohibition unit, moreover, the output of the phase discriminator is connected to a further input of the adder.
    [4]
    4. The device according to p. 3, characterized in that between the inhibit pulse generator and the control input of the inhibit block an element And is connected, to the other inputs of which the outputs of other comparison units are connected, the inputs of which are signals from other nodes of the digital communication network.
    [5]
    5. The device according to p. 3, characterized in that the first and second converters are connected to the inputs of the comparison unit, the signals of other nodes of the digital communication network are supplied to their inputs.
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    US4002839A|1977-01-11|Method and apparatus for the mutual synchronization of the exchange clock pulse oscillators in switching systems of a PCM time division multiplex telecommunication network
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    同族专利:
    公开号 | 公开日
    GB1542923A|1979-03-28|
    LU74196A1|1976-05-18|
    JPS577516B2|1982-02-10|
    DE2523734A1|1976-12-09|
    JPS527611A|1977-01-20|
    CH600700A5|1978-06-30|
    IT1081082B|1985-05-16|
    FR2312906B1|1981-03-20|
    HU177260B|1981-08-28|
    NL7605611A|1976-11-30|
    AT350639B|1979-06-11|
    SE7606031L|1976-11-29|
    BE842321A|1976-11-29|
    US4074080A|1978-02-14|
    ATA253976A|1978-11-15|
    FR2312906A1|1976-12-24|
    DE2523734B2|1977-03-24|
    SE420970B|1981-11-09|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US3109897A|1960-05-20|1963-11-05|Bell Telephone Labor Inc|Synchronization of pulse transmission systems|
    GB1081012A|1964-11-18|1967-08-31|Ferranti Ltd|Improvements relating to frequency stabilising systems|
    GB1219082A|1967-03-14|1971-01-13|Post Office|Frequency control of oscillators|
    JPS5063806A|1973-10-08|1975-05-30|GB1577331A|1976-06-19|1980-10-22|Plessey Co Ltd|Synchronisation arrangements for digital switching centres|
    JPS5781397U|1980-11-04|1982-05-19|
    US4433424A|1981-05-11|1984-02-21|International Business Machines Corporation|Multichannel common clock|
    SE433282B|1982-09-20|1984-05-14|Ellemtel Utvecklings Ab|synchronization system|
    GB2265280B|1990-12-04|1994-10-19|Roke Manor Research|Wide area nodeless distributed synchronisation |
    US5228138A|1991-01-23|1993-07-13|Massachusetts Institute Of Technology|Synchronization of hardware oscillators in a mesh-connected parallel processor|
    IL100871A|1991-02-22|1994-11-28|Motorola Inc|Apparatus and method for clock rate matching in independent networks|
    FR2793623B1|1999-05-11|2003-01-24|Canon Kk|METHOD AND DEVICE FOR CONTROLLING THE SYNCHRONIZATION BETWEEN TWO NI-1 NODES, OR OF A NETWORK|
    GB2404121A|2003-07-18|2005-01-19|Motorola Inc|Inter-network synchronisation|
    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    DE19752523734|DE2523734C3|1975-05-28|Method and circuit arrangement for synchronizing oscillators of a digital fenunel network with oscillators of another telecommunications network|
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